Initialization

During initialization of the Personal Workstation a-Series, status codes are used to show the current step and indicate initialization problems. When the system firmware has initialized successfully, an incrementing count appears in the LEDs.


Initialization Steps

Initialization
Routine
Description
Test the PCIData path test in PCI configuration space. Read the Vendor ID and Device ID fields from the PCI Configuration Header of the PCI/ISA Bridge chip. Check against expected values.
Size the BcacheInit the CPU Scache, and then determine if Bcache is present. If Bcache is present, determine its size and speed. If Bcache is not present, set CPU to make all off-chip references to main memory.
Size memorySize the main memory on a bank per bank basis. The IIC ROM is read from each DIMM. Banks with mismatched DIMMs will cause an error beep code
Configure memoryConfigure memory so the large banks are in low memory and the smaller banks are in high memory.
Test memoryTest memory data paths, address lines, and memory cells.
Initialize memoryInitialize all of configured memory with zeroes. If the Bcache is present, it is flooded to force the highest tags out of Bcache and into memory.
Load the console firmwareLook at the TOY NVR to determine whether to load SRM or AlphaBIOS firmware. Verify the data path and checksum, and then load the system console firmware from the flashROM into memory at the PAL base address.
Initialize the system interfaceThe system CPU/system interface consists of the Pyxis chip and the PCI/ISA bridge chip. Zero the window base registers, init the Pyxis, and zero the IRQ.
Set up the mailbox Build the mailbox containing system information to leave in memory for the console firmware and/or the operating system.


LED Status Codes

When power is turned on, SROM code initializes the CPU, core logic, and memory. After successful initialization, the SROM code loads and starts the AlphaBIOS firmware. The SROM power-up status codes, visible in LEDs on the MLB, are divided into three main categories:

  1. FF to F0 Fatal error codes (Power-up program halts with no further activity.)
  2. EF to E0 Error codes (May not prevent AlphaBIOS from starting.)
  3. DF to CC Status codes (Identify current process in the power-up sequence.)
Powerup CodesDescription
LEDsHex
FFNo Scache bits set in SC_CTL register.
FANo usable memory detected.
F9System initialization failure.
F8PCI data path error.
F5Bcache data path error.
F4Bcache address line error.
F3Bcache cell error.
F1FlashROM data path read error.
E5Memory data path error.
E4Memory address line error.
E0FlashROM checksum error.
DE Init the CPU/system interface.
DCSizing the scache.
DBTesting the PCI data path.
DABcache sizing in progress.
D9Memory sizing in progress.
D8Memory configuration in progress.
D7Memory test initialization in progress.
D6 Bcache bits test in progress.
D5Memory bits test in progress.
D4Bcache address test in progress.
D3Memory address test in progress.
D2Bcache cell test in progress.
D0 Initialize all of memory.
CFConsole firmware loading.
CERe-init the CPU/system interface (if inited before).
CDSROM code execution complete, transfer control to the console firmware.


Beep Codes

Beep CodeDescription
1-2-4The SROM code detected a memory error.
1-3-3No memory was detected, or there was memory, but during testing it failed and was marked unavilable.
1-1-4Bad flashROM data path (manufacturing data pattern did not match the expected pattern), or there was a checksum error.