Address: 87.6000.0400, 87.6000.0500, 87.6000.0600, 87.6000.0700 The Window Base Register (WBR) provides the base address for a particular target window. There are four WBRs: W_BASE[0], W_BASE[1], W_BASE[2], and W_BASE[3]. The W_BASE[x] registers should not be modified unless software insures that no PCI traffic is targeted for the window being modified. Determining a Hit in the Target Window:
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W_BASE | <31:20>RW | W_BASE specifies the PCI base address of the PCI Target Window and is used to determine a hit in the window. See MCES_ENABLE and DAC_ENABLE also. |
Reserved | <19:4>RO | N/A |
DAC_ ENABLE | <3>RW | When the DAC_ENABLE bit is set, then the W_DAC register is compared against PCI address<39:32> for a PCI DAC cycle. If this compare "Hits," and the 32-bit portion of the PCI address "Hits," then a DAC cycle "Hit" occurs. |
MEMCS_EN (only in W0_BASE) | <2>RW | When the MEMCS_EN bit is set then the MEMCS signal from the PCI ISA or PCI EISA bridge is ANDed with the normal window "Hit." |
Wx_BASE _SG | <1>RW | When the Scatter/Gather bit is cleared, the PCI Target Window uses direct mapping to translate a PCI address to a CPU address. When the SG bit is set, the PCI Target Window uses Scatter/Gather mapping to translate a PCI address to a physical memory address. |
W_EN | <0>RW | When W_EN is cleared, the PCI Target Window is disabled and will not be used to respond to PCI-initiated transfers. When W_EN is set, the PCI Target Window is enabled and will be used to respond to PCI-initiated transfers that "Hit" in the address range of the Target Window. |